Rehan Kapadia
Director MOSIS 2.0
Your Gateway to Rapid Prototyping
Don't miss our upcoming MPW tapeout dates!
| Foundry Service | Technology Node | Tapeout Date |
|---|---|---|
| TSMC | 0.18 µm | 12/7/2025 |
Nanofab Prototyping
Rapid prototyping and process development capability through access to seven university nanofabrication facilities and three DoD-volume fabs within the Southern California area.
MPW Services
Supporting both silicon CMOS and advanced compound semiconductor technologies with seamless access to a wide array of commercial silicon MPW services from leading foundries.
IC Design
Providing comprehensive chip design services that simplify and streamline the development process, enabling customers to bring their innovative ideas from concept to silicon.
Upcoming Events
Check back later for announcements about future events.
MOSIS 2.0 Feed
Engaging with MOSIS 2.0
MOSIS 2.0 is the central storefront and gateway to access cutting-edge prototyping services, targeting advanced RF, 5G/6G, and EW applications.
The Prototype Integration and Engineering Service (PIES) Team is at the core of MOSIS 2.0 - a dedicated fab-knowledgeable engineering group that supports designers to accelerate their innovations to solutions.
- Internal "Pipe Cleaner" Projects: PIES-led prototyping to optimize workflows, methods, and infrastructure
- Externally Funded Prototyping: Rapid process and chip development for defense/commercial partners
- Process Characterization & Analytics: Metrics, statistical analysis, and modeling with PDF Solutions
- Small-Volume Fabrication Services: Flexible access to design/development via Fabublox on MOSIS Storefront
- MPW & EDA Services: Efficient prototyping through DoD/Commercial foundries with MPW and design tools.
We invite innovators, researchers, and industry partners to engage with MOSIS 2.0-and join us in advancing next-generation microelectronics.
Meet the Team
Christine Lee
Fabrication Services
Team Lead
Damon McCaskill
Senior Project Manager
Jeung Hun Park
MPW Services Team Lead
Two years into California DREAMS, USC Information Sciences Institute's Computational Systems Division is tackling one of the biggest challenges in chip development: the "valley of death" between brilliant ideas and working prototypes.
The problem? Modern semiconductor designs require expensive IP licenses, complex toolchains, and expertise in peripheral technologies that pull innovators away from their breakthrough ideas. A single chip can demand hundreds of thousands of dollars in licensing costs alone.
Our solution combines three strategic approaches:
Rapid Design Generation → Platform SoC generators that can produce complete architectures in hours instead of months, enabling parallel design space exploration
Comprehensive IP Repository → Silicon-verified processors, accelerators, and specialized cores including our DARPA-developed high-speed DSP and homomorphic encryption IP
Accelerated Prototyping → FPGA-based platforms (MAPP) that dramatically reduce pre- and post-fabrication testing complexity and cost
What sets us apart: we're a DMEA-accredited trusted IC supplier with CMMC accreditation, combining university research agility with the security credentials and infrastructure to support sensitive government projects.
The result? Research teams can focus on their core innovations while we handle the increasingly complex infrastructure demands. We're restoring semiconductor development to its innovation-focused roots.
Read the full story about how MOSIS 2.0 is transforming the semiconductor development ecosystem → https://lnkd.in/gKmDm8D4
Check out our video recap https://lnkd.in/grQvmwVf
Our expert panel brought together leaders shaping the future of U.S. microelectronics:
✨ Tim Morgan – Technical Director, Microelectronics Commons
✨ Eric Makara – 5G/6G Lead, Microelectronics Commons
✨ Scott Bukofsky – Senior VP, Microelectronics, NSTXL (National Security Technology Accelerator)
✨ Victor Mai – Deputy Director, Microelectronics Commons at NSTXL (National Security Technology Accelerator)
In a recent talk, Rehan Kapadia, director of MOSIS 2.0, laid out a bold roadmap for the future of rapid microelectronics prototyping, one that reinvigorates the original MOSIS spirit while meeting the complexity of today’s semiconductor landscape.
Kapadia traced the origins of MOSIS back to 1981, when it democratized chip fabrication by giving researchers access to multi-project wafers. Today, he explained, the challenges are bigger, and so are the opportunities.
Here are the key takeaways from his talk:
✨ A national ecosystem, not just a service
MOSIS 2.0 is connecting universities, fabs, advanced packaging houses, photonics facilities, and industry partners to streamline the full journey from concept to hardware.
🔧 Lowering barriers to prototyping — again
Just as the original MOSIS opened the door for CMOS design, MOSIS 2.0 is expanding that access to heterogeneous integration, advanced packaging, photonics, and more.
🤝 Hands-on support through the PIES team
Kapadia emphasized that designers don’t need to arrive with a finished GDS — MOSIS 2.0 guides teams from early idea to manufactured prototype.
📈 Data-driven fabrication
By leveraging shared data and coordinated processes, the network aims to reduce risk, shorten cycles, and make prototyping more predictable across facilities.
Kapadia closed with a clear message: Innovation accelerates when access expands. And MOSIS 2.0 is here to make that access real.
👉 Learn more about his talk and the vision behind MOSIS 2.0 here: https://lnkd.in/gApe2Nuh
At the recent MOSIS 2.0 Developer Workshop, leaders from government and industry came together to explore how streamlined prototyping, trusted access, and a focused growth strategy can help bridge the lab-to-fab gap.
Read the full recap of the panel “Strategic Leadership through Accelerated Prototyping” here --> https://lnkd.in/gWTF-gy7
California DREAMS
After an introduction by CA DREAMS director Steve Crago on the hub's timeline and expectations, Rehan Kapadia, Director of MOSIS 2.0, shared how this revitalized platform is building on a remarkable legacy to empower the next generation of U.S. microelectronics innovation. He explained what is expected from partners, legacy and new, and how white papers will be selected to be presented as projects to the United States Department of War. He also went over the workflow in place with our nanofab partners.
Originally founded in 1981, MOSIS transformed chip design by making fabrication accessible to researchers and startups alike. Today, MOSIS 2.0 is carrying that mission forward—connecting academic, government, and industry partners through the CA DREAMS Hub to accelerate rapid prototyping, expand MPW services, and provide streamlined paths from concept to hardware.
From new tools for system-level prototyping to a flexible engineering support team (PIES) helping users navigate fabrication networks, MOSIS 2.0 is redefining collaboration across the microelectronics ecosystem.
We’re proud to see this visionary effort leading the conversation as we kick off a week of progress, partnerships, and possibility.
🔗 Learn more about MOSIS 2.0: mosis2.com