Rehan Kapadia
Director MOSIS 2.0
Your Gateway to Rapid Prototyping
Don't miss our upcoming MPW tapeout dates!
| Foundry Service | Technology Node | Tapeout Date |
|---|---|---|
| TSMC | 12nm | 4/8/2026 |
Nanofab Prototyping
Rapid prototyping and process development capability through access to seven university nanofabrication facilities and other experimental prototyping facilities within the Southern California area and throughout the nation.
MPW Services
Supporting both silicon CMOS and advanced compound semiconductor technologies with seamless access to a wide array of commercial silicon MPW services from leading large, medium, and small-volume foundries.
IC Design
Providing comprehensive chip design services that simplify and streamline the development process, enabling customers to bring their innovative ideas from concept to silicon.
Upcoming Events
MOSIS 2.0 Developer Workshop at GOMACTech 2026
Hilton Garden Inn New Orleans Convention Center
March 103:30 β 5:30 pm CST1001 S. Peters StreetNew
Orleans, LA
More event details coming soon.
Donβt miss the opportunity to engage with MOSIS 2.0 and accelerate your semiconductor circuit design and prototyping from concept to tape-out!
Fill Out Our Interest FormMOSIS 2.0 Feed
Engaging with MOSIS 2.0
MOSIS 2.0 is the central storefront and gateway to access cutting-edge prototyping services, targeting advanced RF, 5G/6G, and EW applications.
The Prototype Integration and Engineering Service (PIES) Team is at the core of MOSIS 2.0 - a dedicated fab-knowledgeable engineering group that supports designers to accelerate their innovations to solutions.
- Internal "Pipe Cleaner" Projects: PIES-led prototyping to optimize workflows, methods, and infrastructure
- Externally Funded Prototyping: Rapid process and chip development for defense/commercial partners
- Process Characterization & Analytics: Metrics, statistical analysis, and modeling with PDF Solutions
- Small-Volume Fabrication Services: Flexible access to design/development via Fabublox on MOSIS Storefront
- MPW & EDA Services: Efficient prototyping through DoW/Commercial foundries with MPW and design tools.
We invite innovators, researchers, and industry partners to engage with MOSIS 2.0-and join us in advancing next-generation microelectronics.
Meet the Team
Christine Lee
Fabrication Services
Team Lead
Damon McCaskill
Senior Project Manager
Jeung Hun Park
MPW Services Team Lead
π March 10 | 3:30β5:30 PM CST
π Hilton Garden Inn, New Orleans Convention Center
Discover how MOSIS 2.0 can be your one-stop shop for access to MPW runs, research fabs, and expert design support.
π Register your interest now:οΏ½ https://lnkd.in/gRVCw88a
Also find us at booth 412 at the GOMACTech Exhibition.
π Hilton Garden Inn β New Orleans Convention Center
π March 10 | 3:30 β 5:30 PM CST
This workshop is designed for semiconductor and microelectronics developers looking to accelerate circuit design and prototyping β from concept to tape-out.
Engage directly with the MOSIS 2.0 team and explore how to streamline your development cycle and bring advanced microelectronic systems to life faster.
Seats are limited.
π Express your interest here: https://lnkd.in/gRVCw88a
You can also chat with us at booth 412 at the GOMACHTech exhibition. We look forward to meeting you!
Β
Are you passionate about advancing semiconductor design infrastructure? We have an exciting opening on the MOSIS 2.0 PIES Team at USC/ISI.
π Los Angeles, CA (On-site at USC University Park Campus)
πΌ Full-Time | Salary: $156,918 β $180,000
What You'll Do:
πΉ Maintain and optimize multi-vendor EDA tool flows for digital design
πΉ Manage cloud platforms for EDA tools and IP repositories
πΉ Support users across the MOSIS 2.0 hub and partner ecosystem
You're a Great Fit If You Have:
β Experience with EDA tools from vendors like Ansys, Cadence, Siemens, Synopsys
β Cloud platform experience for EDA deployment
β Master's degree in EE or related field
β U.S. citizenship or permanent residency (ITAR/EAR required)
Apply now: https://lnkd.in/gVCEBSs7
Know someone perfect for this? Share away!
Our booth is #11 and we will be open Tuesday 8-5 PST and Wednesday 8-11 PST.
We hope to see you there!
Two years into California DREAMS, USC Information Sciences Institute's Computational Systems Division is tackling one of the biggest challenges in chip development: the "valley of death" between brilliant ideas and working prototypes.
The problem? Modern semiconductor designs require expensive IP licenses, complex toolchains, and expertise in peripheral technologies that pull innovators away from their breakthrough ideas. A single chip can demand hundreds of thousands of dollars in licensing costs alone.
Our solution combines three strategic approaches:
Rapid Design Generation β Platform SoC generators that can produce complete architectures in hours instead of months, enabling parallel design space exploration
Comprehensive IP Repository β Silicon-verified processors, accelerators, and specialized cores including our DARPA-developed high-speed DSP and homomorphic encryption IP
Accelerated Prototyping β FPGA-based platforms (MAPP) that dramatically reduce pre- and post-fabrication testing complexity and cost
What sets us apart: we're a DMEA-accredited trusted IC supplier with CMMC accreditation, combining university research agility with the security credentials and infrastructure to support sensitive government projects.
The result? Research teams can focus on their core innovations while we handle the increasingly complex infrastructure demands. We're restoring semiconductor development to its innovation-focused roots.
Read the full story about how MOSIS 2.0 is transforming the semiconductor development ecosystem β https://lnkd.in/gKmDm8D4